(Detailed) Instructions to build DINOSAURHIPHOP:

First, get a standard Trezor build environment working.  I use Ubuntu 14.04:

    sudo apt-get install -y build-essential git python gcc-arm-none-eabi
    git clone https://github.com/trezor/trezor-mcu/
    cd trezor-mcu
    git checkout v1.3.5
    git submodule update --init    
    make -C vendor/libopencm3
    make

(optional)
To compile a Trezor firmware:
    cd firmware
    make
    

To compile a Trezor bootloader:
    Modify Makefile.include to change -O3 to -Os in OPTFLAGS
    cd bootloader
    make

To create a combined image to write down to a DINOSAURHIPHOP:
    build a bootloader.bin (as above)
    python firmware_align.py bootload.bin
    cp bootloader.bin combine/bl.bin
    wget https://mytrezor.s3.amazonaws.com/firmware/trezor-1.3.5.bin -O fw.bin
    python prepare.py
    
To setup dfu-util:
    git clone git://git.code.sf.net/p/dfu-util/dfu-util
    cd dfu-util
    apt-get install autoconf libusb-1.0.0-dev
    ./autogen.sh
    ./configure
    make
    sudo make install

To flash a conbined.bin to the DINOSAURHIPHOP:
    WARNING:  without source modifications, this will cause your DINOSAURHIPHOP
              to become FUNCTIONALLY IDENTICAL to a Trezor - including PERMINANTLY
              locking the memory sections containing the bootloader code.
    Slide the switch to DFU-Bootloader mode and plug in the USB on your DINOSAURHIPHOP
    sudo /usr/local/bin/dfu-util -v -D combined.bin -a 0 -s 0x8000000:1048576



To DISABLE the bootloader memory protection locking code:
    comment out the call to memory_protect at the beginning of main (line 144) in bootloader.c

    I've also had difficulty with the bootloader getting caught in the random32 call in the beginning of main(), and the workaround is replacing it with a fixed value, for example 0x41414141.  This behavior needs to be understood better before any fulltime use.

To use a 25Mhz crystal (rather than an 8Mhz crystal), apply the following patch to the libopencm3 code:

diff --git a/include/libopencm3/stm32/f2/rcc.h b/include/libopencm3/stm32/f2/rc
index 6169388..bca15f3 100644
--- a/include/libopencm3/stm32/f2/rcc.h
+++ b/include/libopencm3/stm32/f2/rcc.h
@@ -479,6 +479,7 @@ extern uint32_t rcc_apb2_frequency;
 /* --- Function prototypes ------------------------------------------------- *
 
 enum rcc_clock_3v3 {
+    RCC_CLOCK_3V3_NONE,
        RCC_CLOCK_3V3_120MHZ,
        RCC_CLOCK_3V3_END
 };
@@ -497,6 +498,7 @@ struct rcc_clock_scale {
 };
 
 extern const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END];
+extern const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END];
 
 typedef enum {
        RCC_PLL, RCC_HSE, RCC_HSI, RCC_LSE, RCC_LSI
diff --git a/lib/stm32/f2/rcc.c b/lib/stm32/f2/rcc.c
index 6955034..8c23709 100644
--- a/lib/stm32/f2/rcc.c
+++ b/lib/stm32/f2/rcc.c
@@ -49,6 +49,20 @@ uint32_t rcc_apb1_frequency = 16000000;
 uint32_t rcc_apb2_frequency = 16000000;
 
 const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END] = {
+    { /* PLACEHOLDERHACK */
+       .pllm = 8,
+       .plln = 240,
+       .pllp = 2,
+       .pllq = 5,
+       .hpre = RCC_CFGR_HPRE_DIV_NONE,
+       .ppre1 = RCC_CFGR_PPRE_DIV_4,
+       .ppre2 = RCC_CFGR_PPRE_DIV_2,
+       .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
+                       FLASH_ACR_LATENCY_3WS,
+       .apb1_frequency = 30000000,
+       .apb2_frequency = 60000000,
+       },
+
        { /* 120MHz */
                .pllm = 8,
                .plln = 240,
@@ -64,6 +78,41 @@ const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_
        },
 };
 
+const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END] = {
+    { /* 48MHz */
+        .pllm = 25,
+        .plln = 96,
+        .pllp = 2,
+        .pllq = 2,
+        .hpre = RCC_CFGR_HPRE_DIV_NONE,
+        .ppre1 = RCC_CFGR_PPRE_DIV_4,
+        .ppre2 = RCC_CFGR_PPRE_DIV_2,
+        //.power_save = 1,
+        .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
+                FLASH_ACR_LATENCY_3WS,
+        .apb1_frequency = 12000000,
+        .apb2_frequency = 24000000,
+    },
+    { /* 120MHz */
+        .pllm = 25,
+        .plln = 240,
+        .pllp = 2,
+        .pllq = 5,
+        .hpre = RCC_CFGR_HPRE_DIV_NONE,
+        .ppre1 = RCC_CFGR_PPRE_DIV_4,
+        .ppre2 = RCC_CFGR_PPRE_DIV_2,
+        //.power_save = 1,
+        .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
+                FLASH_ACR_LATENCY_3WS,
+        .apb1_frequency = 30000000,
+        .apb2_frequency = 60000000,
+    },
+};
+
+
+
+
+
 void rcc_osc_ready_int_clear(osc_t osc)
 {
        switch (osc) {


    This is a bit of a hack, and I intend to clean this up and submit a pull request to opencm3.
    But not today.

    Then modify setup() in setup.c to account for the change:

-       struct rcc_clock_scale clock = rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_120MHZ];
+       struct rcc_clock_scale clock = rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_120MHZ];


======================================
To sign your own firmware:

    sudo apt-get install python-pip
    sudo pip install ecdsa ssss
    To generate keys:
        python firmware_sign_split.py
    Modify the top of firmware_sign to replace with your pub keys
    Run three times to add signatures, once for each of three slots:
        python python firmware_sign.py -s -f trezor.bin
    Modify the pubkeys at the top of bootloader/signatures.c with your pub keys
    Recompile bootloader


======================================
To use a hardware debugger (st-link):
    sudo apt-get install openocd
    sudo openocd -f interface/stlink-v2.cfg -f target/stm32f2x_stlink.cfg
    Then, either:
        telnet 127.0.0.1 4444
        reset halt
    OR
        sudo apt-get -o Dpkg::Options::="--force-overwrite" install gdb-arm-none-eabi
        arm-none-eabi-gdb
        target remote :3333
        monitor reset halt


 

=====================================
To modify the ITEAD OLED screen module from i2c to SPI:

remove R3, R4, R5, and R7.

bridge R8 (or solder in a 0-ohm resistor)

http://wiki.iteadstudio.com/128_X_64_OLED_MODULE